Introduction to Sequential Circuits:
The Basic R-S FLIP-FLOP
Consider the above schematic circuit of MC724 quad 2-input NOR gate of R-S Flip-Flop. When power is switched on and no inputs are applied(R=0 and S=0), due to imbalance of the circuit let say Q3 goes into conduction and Q1 and Q2 are in cut-off. Since Q3 is conducting, output at its collector will be zero i.e.Q=0 and Q2 is in cut-oof, it has maximum output voltage at its collector terminal 3 i.e. Q bar=1. The flip-flop is said to be in the RESET position. This is one stable state as shown below.
When the inputs S=1 and R=0, Q1 goes into conduction, making Q bar=0. This makes the collector of Q3 and Q4 high giving Q=1. The flip-flop is now in another stable state i.e SET state and will remain in this state if no input is applied further as shown below.
So,from this the truth of R-S Flip-Flop as follow.
Watch the following video for animation of R-S Flip-Flop
(1) Click on following image and go through the tutorial of Flip-Flop and upload the answer of quiz in it.