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Sequential Digital Circuits

Introduction to Sequential Circuits:

Understanding Flip-Flop:

The Basic R-S FLIP-FLOP

Consider the above schematic circuit of MC724 quad 2-input NOR gate of R-S Flip-Flop. When power is switched on and no inputs are applied(R=0 and S=0), due to imbalance of the circuit let say Q3 goes into conduction and Q1 and Q2 are in cut-off. Since Q3 is conducting, output at its collector will be zero i.e.Q=0 and Q2 is in cut-oof, it has maximum output voltage at its collector terminal 3 i.e. Q bar=1. The flip-flop is said to be in the  RESET position. This is one stable state as shown below.

When the inputs S=1 and R=0, Q1 goes into conduction, making Q bar=0. This makes the collector of Q3 and Q4 high giving Q=1. The flip-flop is now in another stable state i.e SET state and will remain in this state if no input is applied further as shown below.



Similarly, inputs S=0 and R=1 will change state to RESET the flip-flop i.e. Q=0. That means we write 0 into the flip-flop.

If S=1,R=0, we write 1 into memory as Q=1 as shown below. Thus set input makes Q high, a reset input makes Q low.

Symbol of R-S Flip-Flop is as follow.

So,from this the truth of R-S Flip-Flop as follow.

Watch the following video for animation of R-S Flip-Flop

Additional References:

(1) http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/16-flipflops/10-srff/srff.html

(2) http://www.falstad.com/circuit/e-nandff.html

(3) http://www.mekanizmalar.com/sr_flip_flops.html

(4) http://openbookproject.net/electricCircuits/Digital/DIGI_3.html

(5) http://www.play-hookey.com/digital/rs_nor_latch.html

(6) http://www.briarcliff.edu/departments/cis/CSCI280/Digital%20Logic/Flip-Flop%20SR%20Animation.gif

Assignment:

(1) Click on following image and go through the tutorial of Flip-Flop and upload the answer of quiz in it.

Exclusive-OR Gates

The exclusive-OR gate has a high output only when an odd number of inputs is high.

As shown in above circuit of Exclusive-OR gate, the upper AND gate gives output A’B and lower AND gate gives AB’ and both these output are given as input to OR gate whose output is given by Y=A’B+AB’

As shown in above circuit when both the inputs are low, both AND gates have low outputs, therefore final output Y is low.

If input A is low and B is high, the upper AND gate has high output, so the OR gate has high output as shown below.

Similarly, when A is high and B is low, we get final output high as shown below

If both A and B inputs are high, both AND gates have low outputs and the final output is low as shown below.

From the above discussion, the truth table of two input exclusive-OR gate can be given as follow.


From this truth table, we can say output is high when either A or B is high. When both the inputs are low or high, the output is low. This why circuit is known as exclusive-OR gate.

The above figure gives symbol of exclusive-OR gate.

Four Inputs Exclusive-OR Gate:

As shown in above circuit, a pair of exclusive-OR gate driving an exclusive-OR gate. If all inputs are low (A to D), input gates have low output, so the final gate has a low output.(verify from two input exclusive-OR gate truth table). If A to C are low and D is high, the upper gate has a low output, the lower gate has a high output, and the output gate has a high output.

Here is an important property of the above circuit’s truth table. Each ABCD input with an ODD number of 1s produces an output 1 as shown below truth table.

In second row of above truth table, when ABCD=0001, it has ODD number of 1s which gives output 1. When ABCD=0010, it produces output 1.

For EVEN number of input ABCD=0011, it produces output low.

Any Number of Inputs Exclusive-OR Gates:

Encoders

Encoder is a digital circuit that converts an active signal into a coded output signal.

General idea of encoder is illustrated in following block diagram

There are n input lines, only one of which is active. Encoder converts this active input to the binary coded output with m bits.

Decimal-to-BCD Encoder:

The above circuit shows a common type of encoder-the decimal to BCD encoder with 10 inputs and 4 outputs. The switches 0 to 9 are push button switches like a pocket calculator.

When button 3 is pressed, the C and D OR gates have high inputs, therefore output is ABCD=0011 i.e. decimal 3 is converted into its equivalent binary number 0011.

(Verify this conversion using online calculator by clicking on http://www.easycalculation.com/binary-converter.php)

Similarly, if you press button 5, the output will be ABCD=0101

and for switch 9, we get ABCD=1001

The IC-74147 of Encoder:

The above figure shows the pinout diagram for IC-74147, a decimal-to-BCD encoder.Pins 1 to 5 and 10 to 13 are for X1 to X9 decimal inputs and pins 14,6,7 and 9 are for BCD output. Pin 16 is for supply voltage and pin 8 is grounded. Notice bubble at input and output, which indicated active-low signal.

Truth Table:

When all X inputs are high, all outputs are high. When X9 is low, the ABCD output is LHHL or 0110 which is binary equivalent of 9. When X8 is only low input, ABCD is LHHH or 0111 which is binary equivalent of 8.

IC-74147 is called priority encoder because it gives priority to highest order input. That means if all inputs from X1 to X9 are low, it gives priority to highest order 9 which is encoded into out as LHHL. i.e. X9 has priority over all others. When X9 is high it gives priority to X8 and gets encoded if it is low.

Additional References:

(1) http://www.electronicdesignworks.com/digital_electronics/encoders/encoders.htm

(2) http://www.electronics-tutorials.ws/combination/comb_4.html

(3) http://technosains.com/Decimal%20to%20BCD%20Encoder.htm

(4) http://www.cavehill.uwi.edu/fpas/cmp/online/P10F/encoders.htm

(5) http://studyvilla.com/encoder.aspx

1-OF-16 Decoder

A decoder is similar to demultiplexer, with one exception and there is no data input. The only input are the control input ABCD. In this logic circuit only 1 of the 16 output lines is high and therefor it is called 1-OF-16 Decoder.

                                                              1-OF-16 Decoder

Let control input ABCD=0001, so only Y1 AND has all input high, therefore only Y1 is high. The subscript of Y1 is 1, means when you conver ABCD=0001 binary nibble into decimal answer will be 1.Similarly when ABCD=0100, only Y4 AND gate has all high input , as a result Y4 goes high. The subscript of Y4 is 4, so when you conver ABCD=0100 into decimal, it will be 4.

Verify it using following calculator

Thus subscript of high output is always equals the decimal equivalent of ABCD. Therefore circuit is also called a binary-t0-decimal decoder.

IC-74154 as Decoder-Demultiplexer:

As shown in above pin diagram of IC-74154, DATA and STROBE inputs are grounded. The bubbles at the output shows that the output is low when it is active. Say binary input is ABCD=0111, then Y7 output is low, while all other outputs are high.

 

 

Nibble Multiplexer:

In computing or digital,nibble means combination of 4-bit e.g. 0010 or 0001 etc.

                                                              Nibble Multiplexer

As shown in above circuit, there are two input nibble one on the left is A3A2A1Ao and on the right is B3B2B1Bo. The control signal SELECT determines which input nibble(A3A2A1A or B3B2B1Bo) is transmitted to the output.

When SELECT is low, the four NAND gates on the left are activated, so output is  Y3Y2Y1Yo=A3A2A1Ao

When SELECT is high, the four NAND gates on the right are activated and we get Y3Y2Y1Yo=B3B2B1Bo

  • Pinout diagram of Nibble Multiplexer IC-74157


Multiplexers

A multiplexer is a circuit which has many inputs but only one output. Multiplexer  or MUX means many into one. By applying proper control signal we can steer any input to the output. Therefor it is also known as data selector and control inputs are called select inputs.

Watch this ppt on Multiplexer

MUXBlockDia gives the general idea of MUX. m control signal can select maximum 2 rest to m input signals and therefore n should be less than or equal to 2 rest to m.

Go through 4-to-1 Multiplexer

Click on this Image for Multiplexer Animation

As shown in the circuit diagram ‘a‘ (or A) and ‘b ‘(or B) are control inputs, A (or D0),B(or D1),C(or D2).D(or D3) are data inputs and Q (or Y) is output.

First end gate will give output of a’b’A(0r A’B’D0), second a’bB(or A’BD1), third ab’C(or AB’D2) and fourth abD(or ABD3) and these output will be given to ‘OR’ which will give output as

Q=a’b’A+a’bB+abC+abD

or

Y=A’B’D0+A’BD1+AB’D2+ABD3

From above equation, suppose control inputs a (or A) =0 and b (or B)=0 then

Q=0’0’A+0’0B+00’C+00D

or

Y=0’0’D0+0’0D1+00’D2+00D3

Therefore Q or Y =1.1D0+1.0D1+0.1D2+0.0D3

Q or Y =D0

Similarly, for control inputs ab or AB =00 the first AND gate to which D0 or A is connected will activate and its output is D0 and all other AND gates are inactive with zero output. Thus Q or Y output with ab or AB=00 will be D0. If D0=0 then output will be zero and if Do=1 output will be 1.

Same way, for ab or AB =01, the Q or Y output will be D1. In a similar manner we get the following truth table


Control Inputa or A                  b  or  B OutputQ or Y
0                               0 Do or A
0                               1 D1 or B
1                               0 D2 or C
1                               1 D3 or D

More clearly go through this ppt

  • Watch video on Multiplexer Based Design.

Combinational Logic-Multiplexer

Summary: Must go through this page of MUX

Assignment:

Q.1    How many control inputs are required for 5-to-1 MUX?

Q.2. Give the type of commercial ICs of multiplexer.

Q.3   Send link of 16-to-1 multiplexer with its output Y equation

and explain its operation in brief.

Q.4   Draw the pinout diagram of 74150 of multiplexer IC and

describe its function with truth table?

Q.5 Can we design multiplexer using OR gates in place of AND and AND gate in place of OR?

Q.5  Go to this link of Multiplexer Applet(on right  top and click on multiplexer) and explain the operation of MUX circuit  with its truth table in excel sheet?

Q.6 Go to this Learning Object of Multiplexer and answer the four questions given in it.

Q.7 Search the link of MUX  tutorial(at least 5 other than used already) and its ICs relevant to our syllabus.

Q.8 Search the ppts and pdf of MUX other than used here.

Q.9 Give links of MUX video and audio relevant to our syllabus.

 

 

Data-Processing Circuits

Introduction:

Data is information that has been translated into a convenient form to process   Data-Processing circuits are logic circuits that process binary data. Such logic circuits may be Multiplexer(also known as MUX), De=Multplexer, Encoder, Decoder or Exclusive-OR Gate.

Time: 5 hours

Level : Third Year B.Sc.

Objectives:

  • Decide the output of a multiplexer or demultiplexer based on input conditions.
  • Find out the output of an encoder or decoder from input conditions.
  • Sketch the symbol and explain the operation of Exclusive-OR gate.

Learning Outcomes:

By the end of this unit you should be able to :

  • Describe the operation and truth table of  Multiplexer.
  • Explain the function of IC-74150(16 to 1 Multiplexer)  and Multiplexer Logic.
  • Analysis of Universal Logic Circuit.
  • Discover the functioning of demultiplexer with its IC-74154.
  • Outline of 1-of-16 decoder using IC-74154.
  • Describe the operation of encoders and exclusive-OR gates.